{-# LANGUAGE TemplateHaskell #-}
module Counter where

import Control.Applicative
import Hardware.Chalk 
import System.Directory
import Data.GraphViz


mux :: Signal Bool -> Signal a -> Signal a -> Signal a
mux cs ts es = component "Mux" (pure cond <*> cs <*> ts <*> es)
 where
 cond :: Bool -> a -> a -> a
 cond c t e = if c then t else e

iterator :: Signal (a -> a) -> a -> Signal a
iterator h x = delay x (h <*> iterator h x)

-- A simple counter that counts the number of clock cycles since
--  the "reset" input is high.
counter :: Signal Bool -> Signal Int
counter reset = 
  let c = mux reset (pure (const 0)) (pure ((+) 1))
  in component "Counter" (iterator c 0)

testInput = delay True (delay False (delay False testInput))


